Re: LF: Re: Re: FET RDS

[Andy Talbot <andy.g4jnt@gmail.com>]

Accurate LF Power measurement;

Its all about calibration, accuracy, attention to detail, and thinking about the sources of all errors.

 

If you think carefully about how to make measurements, even using amateur grade equipment you should be able to achieve decent accuracy.  This is done by making most of the errors cancel out so you only have to rely on equipment that can be trusted, or verified elswhere

Here's how I make RF power measurements at LF/MF

 

Test equipment available:

DVM ;  checked and compared with others and against IC voltage standard: Known accuracy < 0.2%

Clamp Ammeter - accuracy 1% - by checking against 2 other DMMs on  current range ,but  prone to a few tens of mA offset drift.  But when measuring in the several-amp region this is within the 2%

 

Analogue 300MHz dual beam scope - which I regard as uncalibrated in absolute terms.  However, it is linear over its full trace height , the attenuator  volts/div is relatively accurate to 1% over the range 0.01 - 5V/div and the response is flat from DC to frequency of interest.  All that has been checked out in the past   Linearity and frequency response are all that matters

 

Bird 30dB 1kW attenuator, DC - 1GHz  and 20dB coax attenuator (18GHz).

0- 50V DC variable PSU

 

Calibration Procedure:

Measure DC input resistance of Bird attenuator

Set scope for 50 ohm term input, fed from the 50dB of combined attenuators

Use DVM to set PSU to 50.0V DC output.and connect it to the input of the attenuator.

View scope trace of the resulting DC level.  It should be "about" 0.158V, which corresponds to  50 Watts in and 50dB of attenuation

Adjust the scope "cal" control so the trace shows 1.58, or 3.16, or whatever, divisions.

(In actual fact the attenuation of the Bird is 29.54dB at DC, total 49.62dB - but that no longer matters - the scope trace is not calibrated)

 

I now know the scope, which has a known decent front panel attenuator is calibrated and errors in RF power attenuator and scope and are cancelled out. 

The DC resistance of the Bird is 50.4 ohms - so only a potential 1% error there.  That wouldn't have been taken out using the DC supply as reference

 

So I can now read voltage on the scope to an accuracy of about 2 - 3% - and know its correct.

 

PA Measurement

 

Apply RF from PA to attenuator input, viewing output sinewave the screen.   Pout =  (Vpk-pk)^2 / 400 * 100000.  

Or a quick calculator Vp-p squared * 250

 

Don't need to asy much about the other half of  the efficiency measurement.   Even if the DVM weren't particulalrly accurate, the fact its the same as used for the DC voltage cal on the attenuator means  any error cancels out.  

 

So now the absolute sources of error are :

DVM calibration on one range  - < 0.2%

DC Current clamp ammeter - 2%,

Scope readout resolution about 2% ish - depends if I squint hard enough!

Load resistance 1%

 

A perfectionist (or a contract-manager in my working days) would want errors added  - so 6% or so potential uncertainty

A realist (or a contractor   "        "        "            " )  would use RSS addition of errors - so 3%  realistic uncertainty

 

Which still - even after all this attention to detail, means a measured 90% efficiency could be 87 or 93%

 

My value of 80% was actually the lower limit of errors, so actual value could be in the region of 80 - 86%

Looking at the voltage across the FETs when on, especially at max Vdd, I can see wher eall teh loss is going - although the tank coil does run a bit warmer than I'd have hoped for.   Its wound with 2mm Litz, and really needs thicker wire.

 

As an alternative - a 50 ohm resistor and schottky diode + decoupling C  into a Hi-Z DVM make a good power detector for RF in the few watts region - like at the 30dB  Bird output.   PROVIDED it behaves as a peak hold detector, ie the decoupling cap does its job.    A DC calibration is reasonably good for checking its ability to measure Vpeak (not pk-pk).   The reading is no longer linear, but does lend itself to lookup tables, and an absoute cal against the DVM knowing the diode drop is mostly constant-ish

 

Whew.............!

 

Andy

www.g4jnt.com

 

 

 

 

On 14 January 2011 10:14, mal hamilton <g3kevmal@talktalk.net> wrote:

Stefan
At this sort of measured efficiency you would need very accurate calibrated
measuring equipment.
Figures of 96% are only possible with MAGIC FETS, RDS 0.0 and PA coils with
wire resistance of 0
Measure DC input V*I (watts) on load, then RF output into a dummy load I
squared R (watts) subtract one result from the other ie loss and calculate %
efficiency.
Instrument accuracy could be out of calibration by several percent.
73 de mal/g3kev

----- Original Message -----
From: "Stefan Schäfer" <schaefer@iup.uni-heidelberg.de>
To: <rsgb_lf_group@blacksheep.org>
Sent: Thursday, January 13, 2011 9:36 PM
Subject: Re: LF: Re: Re: FET RDS


> My LF 1 kW class E PA i using a single IRFP360 at > 96 % efficiency (at
> Z=R=50 Ohm of course). The driver is a ICL7667. The supply voltage is 80
> VDC. That's not a dream ;-)
>
> Stefan/DK7FC
>
> Am 13.01.2011 18:44, schrieb mal hamilton:
> > Jim
> > What you say is correct but it is virtually impossible to achieve the
90%
> > plus efficiency claimed by some. The FET required in practice is not
> > available and these high efficiencies are only theoritical.
> > I have found this in practice ie 80% if you are lucky on a good day
> > mal/g3kev
> >
> >
> > ----- Original Message -----
> > From: "James Moritz"<james.moritz@btopenworld.com>
> > To:<rsgb_lf_group@blacksheep.org>
> > Sent: Thursday, January 13, 2011 5:31 PM
> > Subject: LF: Re: FET RDS
> >
> >
> >
> >> Dear Mal, Andy, LF Group,
> >>
> >> There is a trade-off in construction of MOSFETs - basically, for a
given
> >> area of silicon,  higher BVdss requires a thicker active region of the
> >> MOSFET with higher on resistance. You can reduce Rdson by using a
greater
> >> chip area, but that means higher capacitances, increased cost, etc. So
you
> >> can't have your cake and eat it.
> >>
> >> In Andy's breadboard circuit, there is a mismatch between the available
> >> MOSFET type and the available PSU voltage - the 500V BVdss is a bit too
> >>
> > high
> >
> >> for a 60V DC supply - the peak voltage in an ideal class E is 3.56 x
Vdc,
> >> perhaps you would allow 5 x Vdc for safety. 300V BVdss mosfets seem a
bit
> >> thin on the ground, so more efficient schemes might be to increase Vdc
to
> >> about 100V, or reduce it to about 40V and use lower Rdson 200V mosfets.
> >>
> >> Cheers, Jim Moritz
> >> 73 de M0BMU
> >>
> >>
> >>
> >>
> >
>