Re: LF: Re: Re: FET RDS

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Subject:	Re: LF: Re: Re: FET RDS
From:	John Rabson <[email protected]>
Date:	Fri, 14 Jan 2011 14:45:21 +0100
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References:	<003801cbb33e$8b59e620$0401a8c0@xphd97xgq27nyf> <D9D2BC233E6248D095857032DE0B8974@JimPC> <004001cbb349$8b4ec190$0401a8c0@xphd97xgq27nyf> <[email protected]> <002d01cbb3d3$ded8e9a0$0401a8c0@xphd97xgq27nyf> <[email protected]>
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Thank you for all that, Andy.

May I suggest another thing we might look at?

If we could measure the temperature of the FET case, perhaps we could deduce 
the dissipation, and therefore get a lower bound for the losses.  Now where did 
I put those temperature-sensing ICs?

John F5VLF/G3PAI

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