Re: LF: Class D current spikes

[Andy Talbot <andy.g4jnt@gmail.com>]

AH - HA !!!!!!!!!!!!

Therein may lie your problem.   If you take your input direct to the 74F74 clock and don't hit that with anything other than a square wave you are bound to have problems.   TTL devices (and F series really IS real TTL) get very unhappy with slow edges and can oscillate or show instability at the edges

Even if you precede that with the classic inverter and linearising resistor, at low frequencies you will often see instability.   That fed-back gate design usually works fine at tens of MHz and up, even MHz, but expect instability at kHz frequencies.   Look at the output on a scope, and don't be surprised to see ringing on the edges , especially at low drive levels, and low drive levels are just what you get when the input waveform is keyed on / off

At these frequencies, linear to logic conversion really MUST be done with a Schmitt trigger.   74xCT14 or similar.   Use the ACT or HCT families as opposed to the HC or AC ones as they have a smaller hysteresis between Vin(HI) and Vin(lo), allowing for lower amplitude drive.  They also need different centre biassing for AC coupled signals.  Assuming a 5V rail, Use 2.5V  for HC and AC families,  1.8V for ACT and  HCT devices.

Or an RS422 / RS485  line receiver works well; that has even lower hysteresis and hence lower permitted drive level.

Andy

www.g4jnt.com

On Tue, 26 Feb 2019 at 16:14, Chris Wilson <dead.fets@gmail.com> wrote:

Hello Eric,

Yes, the output is a square wave when I use the U3S I take the output
direct from CLK0 at 2X frequency (set in the U3S menu) via a co-ax to
the input of the W1VD amp to Pin 3 of 74F74 with no 50 Ohm load
resistor. It works perfectly. It makes me think other exciters are
doing something different at the end of the TX cycle. I know not what
though...

The amp is powered all the time, the output solely depends on the
presence or not of an input signal.

Same with the TS-590S, output from the DRV socket at under 0dBm sine
wave at 2X frequency from the 590 into a squarer. Squarer drives the
W1VD amp the same, (no 50 ohm resistor) direct to Pin 3 of the 74F74.
no issues. Run the 590 at 136kHz into a W1VD doubler and a pre amp and
the FETS's life is always short. Death always seemingly occurs at the
end of a WSPR or OPERA cycle. Again the amp stays powered all the time
from either a huge linear supply or an HP SMPS 50V supply from a
server.

I have noted that running the over current limiter on the linear on
the cusp of triggering helps. The SMPS is ruthless in the doubler
scenario and FET life is *always* on the edge. The gate waveforms seem
OK, it's the drain waveform that shows the spikes as the oscillations
decay away. I would love to get to the bottom of this as I have too
many different set ups to remember :) I assumed it was some sort of
feedback from the antenna perhaps, but I am a novice and once I found
what saved me from spending loads at Farnell I gave up chasing the
cause.

Tuesday, February 26, 2019, 12:12:08 PM, you wrote:

> Or in the case of a U3S with a square wave output at CLK0 (I assume it's
> square)... a complete positive half cycle without any further "noise", etc.

> On 2/26/19 7:04 AM, Eric NO3M wrote:
>> Just a thought, perhaps the RF is ending exactly at a zero crossing,
>> whereas a typical PC/soundcard + exciter may not be and that is
>> causing this issue.





--
Best regards,
 Chris                            mailto:dead.fets@gmail.com