Re: LF: Class D current spikes

[N1BUG <paul@n1bug.com>]

Update:

U3S schematic

http://qrp-labs.com/images/ultimate3s/assembly_u3s_r3_lt.pdf

U3S Synthesizer module schematic

http://qrp-labs.com/images/synth/synth_assembly4.pdf

My U3S has the low pass filter installed, so it is CLK0 of he
Si5351A > BS170 FET > LPF > W1VD doubler, amplifier.

Paul


On 2/26/19 2:12 PM, jrusgrove@comcast.net wrote:
> Anyone have a U3S schematic handy? Link to same?
> 
> Jay W1VD
> 
> ----- Original Message ----- 
> From: "N1BUG" <paul@n1bug.com>
> To: <rsgb_lf_group@blacksheep.org>
> Sent: Tuesday, February 26, 2019 2:01 PM
> Subject: Re: LF: Class D current spikes
> 
> 
>> Eric,
>>
>> I I have always run my U3S through the W1VD doubler. Never had any
>> problems with blown FETs with that setup, even when I tested at 1 kW
>> under Part 5 license. There is apparently something different about
>> the U3S at end of RF envelope.
>>
>> 73,
>> Paul
>>
>>
>> On 2/26/19 12:52 PM, Chris Wilson wrote:
>>>
>>>
>>> Hello Eric,
>>>
>>> No,  I have always run the U3S in X2 mode as far as I can remember. No
>>> doubler,  no squarer, just straight out of CLK0 to Pin 3 of the 74F74.
>>> And  no  issues  at all. Thanks. BTW, I really admire your old gear on
>>> your web site, awesome build standards and so nice to look at!
>>>
>>> Tuesday, February 26, 2019, 5:35:10 PM, you wrote:
>>>
>>>> Just to clarify... did you say previously that the U3S also worked fine
>>>> running at 1x and feeding a doubler, squarer, etc. also?
>>
> 
> 

-- 
Paul
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