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Hello group,
Just to close this thread:
Concerning the problem of the first drive pulse with DC power
already on: Bob, W1XP, made an important contribution in a private
mail. He pointed out that the current spike I was worried about
would be limited by the FETs output characteristic anyway. Looking
to the data sheet of my intended IRFB 4227 this seems to be true
although there could persist a certain limitation by the save
operation area. Perhaps I was a little bit too naive estimating
the peak current as Vdc / Rdson ... Be that as it may, using the
newly discovered DC soft start feature of my power supply should
overcome this challenge. Controlled by a logic level input it runs
up the output voltage with a time constant of about 100 ms. This
will protect the FET, avoid any key clicks and won´t affect the
readability of the long lasting vlf signals. To keep the signal
phase constant (essential on vlf) oscillator and gate drive of the
FET won´t be keyed at all.
I´ve just modified the antenna / loading coil system to resonate
at 8270 Hz without transformers, - 3dB band width now being 168
Hz. Including 25 m RG213U from the arbour to the shack (being
later on part of the matching network) the feeding impedance is
now 480 Ohms pure resistive which will be matched to the rest of
the class E PA by its output network. Thus I`m able to omit the
two matching transformers being used up to now, see www.qrz.com/db/dk1is.
Now I´m waiting for the driver ICs coming from China - in Germany
up to now without additional tax ![;)]( "Wink ;)") ;-)
!
Thanks for all the feedback, 73,
Tom, DK1IS
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