Hi Marco,

looking at your schematic, I think the gate drive may be too low. Ideally the driver will make 12 V peak-peak, or +-6V at the gate (probably slightly less in reality, e.g. 5 V). This may not be enough to turn the FETs fully on. So when increasing the drain suppy voltage beyond a certain limit, they will go out of saturation and limit the available output current. In that case you won't get more output power but only much more dissipation. Also the output impedance will go from low (voltage-source) to high (current-source), which could explain the changing frequency response.

I would recommend to double the turns ratio of the gate transformer (e.g. 10:20:20).

73, Markus (DF6NM)

-----Ursprüngliche Mitteilung-----
Von: marcocadeddu <[email protected]>
An: rsgb_lf_group <[email protected]>
Verschickt: Sa, 3. Jun 2017 16:46
Betreff: R: Re: R: Re: LF: Re: I: Fw: For today the FETs survived...

Hi Stefan,

and thank you :-) so you have too something to mumble while sending
VLF SMS ;-)
There is nothing really new.. I started from an avalable
chassis with on board a PS giving 180Vdc (1200W) and assembled the
Andy's half bridge 700W switching PA and before give it the full power
I'm checking with lower DC supply. Attached you see the schematic with
some change at the moment..
The output xfmr has 7T/19T, the coil of the guard circuit is not
connected (now is in serie with L2) and the resonating caps now are
5x1000pF in parallel.
The aim is finally with 180Vdc of supply have an output of 0,5÷1kW
but.... as you probably red in the previous messages, from 10 to 30Vdc
the PA runs, at low power of course (up to 15W), and complies the
calculations; with supply between 30 and 50 Vdc the output go down to a
couple of W.
I made several trials it the last days, changing the core of the xfmr,
the turn ratio, the kind of capacitators but nothing changes (or at
least the change are within a fraction of dB).

that's the sad history Stefan...
All thoughts and suggestions are welcome! (including go to fish ;-)) )
Marco

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