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Interesting Wolf..
That may be a way round the 'gray noise'
issues , especially if the loops are executed in 'real
time' , no higher calls in the system, that's
the problem with the PI, the timing loops
are subject to the occasional 'loss' of cpu access
, with a resultant
'jitter' ....
Frequency ? Would depend ,as to how many clock
pulses are required to execute the 'loop' , 120
steps , would give 1 MHz , but , there must be embedded
routines ? guess , drive could be in
the MHz region , quite clean , when divided down
....
Not much different to a dds ? they can produce
various comb spectrums - if all that's needed is a
simple state change high/low , to drive the divide
chain, the pic may produce better results ?
.....
73-G,
Sent: Tuesday, March 29, 2016 5:20 PM
Subject: Re: [rsgb_lf_group] RE: Cheap and nasty sources - was LF:
DK7FC WSPR bad quality problem
A modern PIC like the dsPIC33EP32GS202 (which I am currently
playing with) can possibly be used for that purpose. It has a multiple
high-speed PWM outputs which can be programmed for periods and pulse durations
with a resolution of 1.04 nanoseconds (!). The datasheets doesn't clearly state
how they achieve this exactly (with a 120 MHz clock frequency feeding the PWM)
but this cheap microcontroller, designed especially for switching mode power
supplies, looks interesting for LW / MF or even the lower HF spectrum. Possibly
the PWM timer is incremented 8 times per 120 MHz cycle, to arrive at the
specified PWM resolution.
With software-based cycle stealing
(reprogramming the PWM to omit one 1.04-ns-step occasionally) there would be
some timing jitter and thus phase noise, but compared with older (slower) PWM
units, it's almost neglectable.
Details from the datasheet:
http://ww1.microchip.com/downloads/en/DeviceDoc/70000323g.pdf
73,
Wolf DL4YHF .
Am 29.03.2016 um 14:54 schrieb Graham:
Andy > PIC
If the execute times of PIC routines are
not subject to IRQ ..or if they are , could be
in a predictable pattern , assuming nothing else was 'going on'
Then , the PIC alone would produce a reasonable
drive [ square wave or pulse] for a
class e/d logic divider chain , there being no
need [lf/mf] for the ppl or dds ?
how fast , will a pic run?
73-G,
Sent: Sunday, March 27, 2016 9:04 PM
Subject: Re: [rsgb_lf_group] RE: Cheap and nasty sources - was LF:
DK7FC WSPR bad quality problem
If you are referring to the close spaced lines making up the
spectrum of the two strong signals, from teh plot you show they appear to be
about 1.5Hz spacing. This is the WSPR symbol rate (actually
1.465Hz) so the lines visible are the natural sidebands from the WSPR
waveform.
I'd be surprised if an DDS itself were generating 100Hz sidebands on its
own. Especially a more modern one like the AD9859. Even
the venerable AD9850 doesn't generate stuff only 40dB down. So
I'd still look for other means of 100Hz leakage. Perhaps getting onto
the reference source. I assume the two stations both
reporting 100Hz sidebands are using identical generating hardware ?
I use an AD9852 for WSPR and generationg MFSK modes generally, a device
perhaps bit a bit older than the AD9859, but the same family, and it is
certainly clean down to at least -60dBc. When driven from a higher
clock frequency, better still.
Andy G4JNT
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