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Re: [Lowfer] LF: Re: FET change, hmmm

To: DK7FC <[email protected]>
Subject: Re: [Lowfer] LF: Re: FET change, hmmm
From: Chris Wilson <[email protected]>
Date: Sun, 2 Dec 2018 17:01:55 +0000
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Hello Stefan,

Any chance of a few photos of the H Bridge amp construction please? I
take it the BF862's in the optocoupler feeds act as current limiters?
Any reason you didn't just use resistors instead? Or is it for
galvanic isolation? The IXDD414CI appears obsolete, the IXDD614CI is
still current from none Chinese suppliers, should I use a 614? Any
thoughts on more modern FET's as the IRFP460A is also off the current
device listings from named suppliers :( Thanks!


Paul: W1VD makes the comment that the IR2110 is near its limit gate
capacitance drive wise, driving the parallelled devices, so a change
to devices with more gate capacitance is going to be pushing things. I
know these are dear but the gate and drain waveforms I see with them
and notably better than the older design FET's, although for me they
have not been an issue. My free supply of the Wolfspeed FET's has
stopped, otherwise I would still use them. I lost a few whilst finding
my feet and ironing out mistakes, and poor layout. A gate capacitance
of 660pF is pretty impressive ;) Can you upload screen shots of the
gate and drain waveforms you are now seeing for comparison, they are
kind of hard to envisage in words ;)

https://www.wolfspeed.com/media/downloads/176/C3M0065090D.pdf

Sunday, December 2, 2018, 4:38:58 PM, you wrote:

> Hi Paul,

> In one of my early PA designa i also used an IR2110 to drive FETs having
> 4 nF gate capacity. At 137 kHz the driver became quite hot and the total
> life time was just about 20 hours. In my opinion this driver is not a 
> good choice for 137 kHz when using large FETs.
> The ringing should be reduced by first reducing stay inductances and 
> then maybe adding 1 to 5 Ohm in series to the gate. I spread the winding
> of the gates in my H bridge equally over the core and then twisted the
> two wires. Also i soldered them as close as possible to the FET, to 
> reduce galvanic coupling.
> 73, GL, Stefan





-- 
Best regards,
 Chris                            mailto:[email protected]


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