Re: LF: Coherent BPSK on LF using EbNaut

[Andy Talbot <andy.g4jnt@gmail.com>]

Yep, that S2 was a typo.

I'm in the process of building a custom direct conversion Rx for narrowband.   So far I've built a follow on digitiser for Softrock or QSD type receivers.  Two identical  opamp filters with a cutoff  of 100Hz driving a pair of simultaneous-sampled 12 bit A/D converters.   A sampling rate of 1.25kHz (it could be lower) provides a degree of oversampling at this bandwidth and enough freedom to play with decimation later.    The A/D results are formatted in a PIC and sent on an RS232 type interface in 4 byte packets at 115200 baud.   (RS232 type signalling using FTDI Chip devices can be made transparent to look like a USB interface to end users)  The A/D clocking is controlled from a 10Mhz referenc einput which is used to clock teh PIC microcontroller.

I realise the dynamic range and sampling are appreciably above what is actually required for receiving narrow band coherent signals - two bit was mentioned here and a 200Hz sampling - but this sort of hardware is, these days, very basic so might as well have a higher than needed performance.  And it does mean the hardware is suitable for faster working, for signals up to 100Hz wide.  Ie it'll pass PSK31

The PIC code at the moment just formats the samples and sends them, but the next stage will be to modify the PIC code to accept a GPS input of NMEA and 1 PPS.  Receiving can  then be based on GPS synced  blocks.   The four-byte packet format has been selected so it is flexible enough to allow a timestamp to be included in the stream, and possibly some info on the block size, with blocks suitably labelled with a header for alignment

High level code to run on a PC to take these samples and "do clever things" with the data will follow .

To complete the receiver an LO will be needed.   The simplest route is to take one of the AD9850 DDS modules, clock it at 10MHz and generate the 4X LO for the Softrock / QSD receiver.  Teh only thing that concerns me about the AD9850 is its 32 bit frequency setting.    The resolution, at 10MHz clock is 10MHz / 2^32 giving a frequency setting accuracy of  +/- 0.0011Hz.   Which may not sound a lot, but does correspond to a complete cycle in 14 minutes.   Or 90 degrees in 3.6 minues.  Which certainly is significant when measuring long term phase and needs taking out in the final software.  

The alternative is to use a 48 bit DDS like the AD9852 for the LO.   

Or do as I once did on a coherent test with G3PLX, specifiy and use  an on-air frequency that is exact when generated in a 32 bit DDS.

Full details of the receiver will be written up and published when the whole system is complete.   The interface format (the four byte packet) needs to have the timestamp yet to be defined, but I'll publish that ASAP.

Andy  G4JNT

On 28 September 2015 at 14:08, Johan Bodin <jhbodin@tele2.se> wrote:

Aha... Thanks Andy.

I assume that the second -S2 in your _expression_ of Q is a typo. If changed to -S3 it all makes sense and the mixing with a quadrature LO at Fs/4 becomes clear. It was something like this I had in mind. This is of course possible to do directly at RF but now I see that downconversion to a low IF before this process is a better idea since it doesn't require heavy decimation of a signal with ridiculous Fs / BW ratio and it stays away from 1/f noise in analog parts as well.

I was thinking along the lines of a QSD when I suggested the simple sampling sequence I, Q, -I -Q. There is no doubt that the hardware QSD *does* work although the samples are not instantaneous but rather averaged over a 1/4 LO cycle in the 4 LPFs of the QSD. Without thinking too much, I had the feeling that a narrow BPF ahead of the ADC would "smear" the signal in the time domain and produce a similar result in the ADC case...

Interesting anyway.