Hi LF PA
Have just seen this new MOSFET drivers with galvanic isolation. Seems very nice
for QRO PAs using mains voltage
https://www.st.com/content/st_com/en/products/power-management/mosfet-and-igbt-gate-drivers/multiple-channel-drivers/stgap2d.html?icmp=tt8623_gl_pron_oct2018
73 de Luis
EA5DOM
-----Mensaje original-----
De: [email protected]
[mailto:[email protected]] En nombre de DK7FC
Enviado el: jueves, 22 de noviembre de 2018 12:10
Para: [email protected]
Asunto: Re: LF: On air again in LF WSPR-15
Hi Chris,
Am 22.11.2018 11:36, schrieb Chris Wilson:
> Thanks for the schematics Stefan! Do you know exactly what toroid you
> used (assuming it is a toroid) for the gate driver transformer please?
>
I tried to describe it as good as possible.
If it helps, here is the link:
https://www.reichelt.de/ringkern-aus-ferroxcube-n30-rik-20-p15247.html?&trstct=pos_0
It is not so critical. As long as the AL value is reasonably, it should work.
Avoid to use a too large diameter because of stray inductances and so on. This
would affect the gate-source voltage.
> Would the output level of the Si chip in a QRP Labs U3S be enough to
> drive this amp direct?
I don't know about the output of the U3S but i assume it is certainly enough to
drive the optocoupler.
The optocouplers are not a must but they can help to avoid problems in the
shack, ground loops and so on, you know. Another transformer may be an
alternative instead. There are many ways to build a system running without
troubles during the operation.
> I do not fully understand what the BF862 /
> 6N136 and 10K pot do, would mind just explaining that bit about
> duty cycle please?
>
Well the 6N136 is an optocoupler providing a very good galvanic decoupling
between the signal generator and the PA. Also it is part of the safety
considerations of the system operating at rectified mains level.
Depending on the signal source in front of the optocoupler and the optocoupler
itselfe, the input voltage of the IXDD will most likely not be a perfect
rectangle with 50 % duty cycle. Using the pot it was possible to adjust for a
nearly perfect 50% duty cycle of the rectangular (+-320 V @ 137 kHz) output
voltage of the H bridge.
In this design it is not super-essential to have a 50% duty cycle. With
53 % for example there will be a residual DC component but this would be taken
by the C in front of the output transformer. The PA would not be destroyed but
the output power would be a little bit lower. Anyway, 50 % is desired.
BTW you know that this design is not intended for linear operation of course,
unless you add another stage modulating the bridge supply voltage. But this is
not necessary for QRSS/DFCW/OP32/WSPR/JT9-X/EbNaut, i.e. for almost any mode.
I admit i even transmitted slow hell with that PA. The result didn't look as
pretty as with a linear PA but it worked as well :-) In fact it shows that the
design seems to be quite robust. Anyway i heared the FETs complaining
(krrzzkrrrktz), you know.
See the attachment from the old days :-)
73, Stefan
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