Hi all,

While PLL systems are in service for systems having quite good signal to
noise ratio (such as telephone modems) it is quite another thing to try and
decode the wanted signal when it is a noise to signal situation.

For other than LF applications I have been looking at "dejitter"
countermeasures for accurate clock recovery from signals passing through
digital links (the sampling causes phase jitter in the original signals),
and it seems that a dual PLL setup is an answer.  PLL#1 to recover what
clock signal can be readily found, then PLL#2 to clean up the jitter from
PLL#1.  PLL#2 could need to have a high performance oven oscillator VCO, to
hold centre frequency for long periods, so it is not without complication.
This approach may have applicability to detection of weak BPSK signals on
LF, but I suspect that a single PLL with free running VCO would be rather
useless for noise to signal scenarios.

73, Bob ZL2CA