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Re: LF: PLL inaccuracy

To: [email protected]
Subject: Re: LF: PLL inaccuracy
From: [email protected]
Date: Sun, 4 Feb 2001 20:46:26 EST
Cc: [email protected]
Reply-to: [email protected]
Sender: <[email protected]>
In a message dated 2/4/01 2:16:24 PM Eastern Standard Time, [email protected] writes:

<< Allow me to quote from the book "Phase Locked Loops, Principle and Practice", McGraw Hill 1996, by P.V. Brennan University College, London. Page 22: "...As far as the control loop is concerned, it should be noted that frequency dividers act equally as phase dividers, so that a factor of 1/N must be allowed for in the loop equations". >>

This is certainly true. It must be taken into account in designing a loop, but it does not represent a source of _frequency_ error so long as lock is maintained.

The example cited from page 128 is such an extreme case that, were the controlled oscillator sufficiently unstable or noisy as to experience short-term excursions beyond 360 degrees at its own frequency--or if the detector were occasionally unable to resolve with the 0.35 degree precision specified--the entire system would be susceptible to coming out of lock entirely! Until that point, the output is still on-frequency, but might exhibit serious phase noise.

This is why one must perform phase comparisons at a reasonable division ratio, even if it means sacrificing extremely narrow frequency steps; or else, one has to be much more meticulous in the design of the VCO and the phase comparator, and even then, lockup times may be rather long.

73,
John


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