Hello all,
We put the output of the si5351A and the level converter through an
attenuator into my SA and things look horrible 9to me, but I am A: Not
very good with the SA and B: frightened of blowing the front end!
We then used the W1VD big LPF bank between the output and the SA and
things look much better (to me...). Could the harmonics be the cause
of the issues???
http://www.chriswilson.tv/mf.zip
First photo is direct from si5351A and level conveter, second is with
the LPF in line. Thanks. I also checked on LF and there are lots of
harmonics there too, but on LF the amp gives no trouble at all.
Monday, June 3, 2019, 9:11:30 PM, you wrote:
> If that voltage divider is against +12V, is that voltage level actually
> stable during switching? Maybe it is worth to spend a RC lowpass filter
> there, say 1 k and 100 nF and then adjust the DC working point.
> 73, Stefan
> Am 03.06.2019 17:56, schrieb Chris Wilson:
>>
>> Hello Luis,
>>
>> I am at work but will draft a more detailed post later. The new
>> CD74HCT74E flip flop board shows similar horrible traces, so I think
>> you may well be on to something here! Thank you. My doubt though is
>> using an HP signal generator to inject a X2 frequency also shows the
>> same dire waveforms, I would have *THOUGHT* its signal would be pretty
>> clean? My USB scope has an FFT function and the gates and drains don't
>> look good on it, using the U3S (no output stage sig straight from
>> CLK0 pin of the Si5351A) but it's a bit of a toy in that mode. I could use an
>> SA to look at the input and fiddle with a LFP on it I suppose. Thanks
>> again.
>>
>> Sunday, June 2, 2019, 9:38:07 PM, you wrote:
>>
>>
>>> Hi Chris
>>>
>>
>>> One of the modifications I have done to the LF PA is related to the input
>>> at HEF4013
>>>
>>
>>> I was using the typical 220nF in series and a 12K and 10K resistors to +12V
>>> and GND
>>> The exciter is also an U3, but the old one with DDS. Anyway, the
>>> problem was that the input was too
>>> sensible (too high impedance) and any small signal drived the HEF4013. The
>>> drain waveforms were
>>> also not nice at all, and not squared. I even found that just
>>> touching the input of the PA with my
>>> finger drived it out at make the mosfets to work in a very unstable and
>>> ugly way
>>>
>>
>>> So modified the input components to work as low pass filter and provide
>>> lower impedance
>>> The 220nF was changed to 47pF and the 10K to GND replaced with a 5K
>>> adjustable trimmer
>>> The 12K to 12V is still in use. You will have to use different values for
>>> MF to get it working
>>> a 950KHz
>>>
>>
>>> I adjusted the trimmer to work with a 270KHz input signal at 8V5
>>> p-p. Higer frequency signals do not drive
>>> the HEF4013 at all. Now this is a completely different PA. Squared
>>> drain waveforms and absolutely stable
>>>
>>
>>> Seems that garbage in = garbage out rule do also apply here ;-)
>>>
>>
>>> Have a try and let us know. It is an easy test
>>>
>>
>>> 73 de Luis
>>> EA5DOM
>>>
>>
>>
>>
>>> ________________________________________
>>> De: [email protected]
>>> [[email protected]] en nombre de Chris Wilson
>>> [[email protected]]
>>> Enviado: domingo, 2 de junio de 2019 16:11
>>> Para: [email protected]
>>> Asunto: LF: HEF 4013 flip flop anomaly
>>>
>>
>>> Hi, I thought a separate thread best for this question
>>>
>>
>>> U3S exciter for MF, taking the X2 frequency output @ circa 950 kHz
>>> from the Si5351A CLK0 output pin to a level converter using a
>>> SN74AHCT125N buffer between the si5351a and the HEF4013 flip flop,and
>>> we are seeing something we do not understand, maybe someone can
>>> explain?
>>>
>>
>>> We have an adjustable voltage regulator off the main 12V supply for the
>>> HEF4013, next to it on my little driver board, and by chance, we found
>>> that as we lower the voltage to the HEF4013 the drain waveforms clean
>>> up, and just before the 4013 shuts down they are relatively good. I'll
>>> link to scope shots.
>>>
>>
>>> We have the driver board grounded right by the driver IC ground points
>>> to as near the FET source pins as the layout will allow (10 mm or so,
>>> copper sheet strap) Before we go further we would like to know why
>>> reducing the voltage to the 4013 improves things! We also see the gate
>>> waveforms go negative when the FET's have power to them, without
>>> voltage applied they are perfectly square. You can see this effect in
>>> the screenshots. Gates are lower traces, drains upper. Thanks.
>>>
>>
>>> We are building a board using a CD74HCT74E flip flop in the meantime,
>>> we suspect a 4000 series is not the best choice...
>>>
>>
>>> http://www.chriswilson.tv/4-point-8v-on-4013-25v-on-drains.png
>>>
>>
>>
>>> http://www.chriswilson.tv/6v-on-4013-25v-on-drains.png
>>>
>>
>>
>>
>>
>>
>>> --
>>> Best regards,
>>> Chris mailto:[email protected]
>>>
>>
>>
>>
>>
>>
>>
--
Best regards,
Chris mailto:[email protected]
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