What an elegant solution ! For a signal generator as a piece of test
equipment its ideal ! Although for my purposes in a receiver, exact
frequency increments are not necessary provided the exact value is known.
Furthermore the more 'rubbery' or pullable the crystal is, you can make the
PLL wider bandwidth, so reducing phase noise.
Furthermore, instead of using 1MHz derived via a PLL etc from GPS, you could
programme the fixed DDS with a code of 40 and generate a 1Hz signal which
you could then lock to 1s GPS pulses directly.
Not if it is phase locked to the 5/10MHz standard.
My idea was to use a second DDS chip as divider (with fixed "nice number"
phase increment) to get a "nice number" PLL reference frequency. The VCXO
is then the only odd-ball frequency in the system.
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