G'day Rik,

BTW,  another idea :
What happens if you send a BPSK (instant phase switching) as reference
signal to a PLL ?
The reaction time of the PLL would depend on the feedback circuitery,

maybe

this could also be used to get 'soft phase transistions'.
At 136kHz the whole PLL could be incorporated in a single CMOS4046, just 1
cheap IC and half a dozen resistors/capacitors might do the job.

What a fascinating idea !!   I have been struggling with a way to reduce the
BW of the simple hard-phase switching from an XOR gate (used for generating
FDK signals).    I had tried all sorts of complicated ways of generating a
suitable signal (PWM with high switching frequency, stepped phase change,
etc) not much different from previous ideas from others.    Your idea of a
PLL captured (:-) my interest.

I did a couple of spectrum analyses using Excel for both the hard-switched
case (see Wanjina.gif attached - 3kB) and for a slow-phase case (see
Wanjina_Slow.gif attached - 3kB).

The hard-switched case shows the expected spectrum.    The slow-switched
case shows the appearance of the "carrier" frequency between the two mains
sidebands and the close-in sidebands are of the same order of magnitude as
the hard-switched case.    The gain comes from the rapid roll-off further
out.

Looks promising.    When I get a round tuit I will implement this using a
CD4046 as suggested.    There are two phase detectors.    One which uses an
XOR gate and locks to a phase difference of 90 degrees.    This one is not
suitable as it seems to lock to +/-90 degrees, therefore I suspect for an
180 degrees shift it would only momentarily hiccup but not actually switch
phase.    The other phase detector locks to a zero phase difference and so
would switch.    The only disadvantage is that it has less noise immunity.
This should not be an issue here as there are no S/N considerations (or very
little).

A great piece of lateral thinking Rik !!

73s Steve Olney (VK2ZTO/AXSO - QF56IK : Lat -33 34 07, Long +150 44 40)
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