Hi Chris
One of the modifications I have done to the LF PA is related to the input at
HEF4013
I was using the typical 220nF in series and a 12K and 10K resistors to +12V and
GND
The exciter is also an U3, but the old one with DDS. Anyway, the problem was
that the input was too
sensible (too high impedance) and any small signal drived the HEF4013. The
drain waveforms were
also not nice at all, and not squared. I even found that just touching the
input of the PA with my
finger drived it out at make the mosfets to work in a very unstable and ugly way
So modified the input components to work as low pass filter and provide lower
impedance
The 220nF was changed to 47pF and the 10K to GND replaced with a 5K adjustable
trimmer
The 12K to 12V is still in use. You will have to use different values for MF to
get it working
a 950KHz
I adjusted the trimmer to work with a 270KHz input signal at 8V5 p-p. Higer
frequency signals do not drive
the HEF4013 at all. Now this is a completely different PA. Squared drain
waveforms and absolutely stable
Seems that garbage in = garbage out rule do also apply here ;-)
Have a try and let us know. It is an easy test
73 de Luis
EA5DOM
________________________________________
De: [email protected] [[email protected]] en
nombre de Chris Wilson [[email protected]]
Enviado: domingo, 2 de junio de 2019 16:11
Para: [email protected]
Asunto: LF: HEF 4013 flip flop anomaly
Hi, I thought a separate thread best for this question
U3S exciter for MF, taking the X2 frequency output @ circa 950 kHz
from the Si5351A CLK0 output pin to a level converter using a
SN74AHCT125N buffer between the si5351a and the HEF4013 flip flop,and
we are seeing something we do not understand, maybe someone can
explain?
We have an adjustable voltage regulator off the main 12V supply for the
HEF4013, next to it on my little driver board, and by chance, we found
that as we lower the voltage to the HEF4013 the drain waveforms clean
up, and just before the 4013 shuts down they are relatively good. I'll
link to scope shots.
We have the driver board grounded right by the driver IC ground points
to as near the FET source pins as the layout will allow (10 mm or so,
copper sheet strap) Before we go further we would like to know why
reducing the voltage to the 4013 improves things! We also see the gate
waveforms go negative when the FET's have power to them, without
voltage applied they are perfectly square. You can see this effect in
the screenshots. Gates are lower traces, drains upper. Thanks.
We are building a board using a CD74HCT74E flip flop in the meantime,
we suspect a 4000 series is not the best choice...
http://www.chriswilson.tv/4-point-8v-on-4013-25v-on-drains.png
http://www.chriswilson.tv/6v-on-4013-25v-on-drains.png
--
Best regards,
Chris mailto:[email protected]
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