Return-Path: Received: from post.thorcom.com (post.thorcom.com [195.171.43.25]) by klubnl.pl (8.14.4/8.14.4/Debian-8+deb8u2) with ESMTP id w01BVOFf022858 for ; Mon, 1 Jan 2018 12:31:25 +0100 Received: from majordom by post.thorcom.com with local (Exim 4.14) id 1eVyFZ-0003ED-MH for rs_out_1@blacksheep.org; Mon, 01 Jan 2018 11:27:25 +0000 Received: from [195.171.43.32] (helo=relay1.thorcom.net) by post.thorcom.com with esmtp (Exim 4.14) id 1eVyFZ-0003E4-AP for rsgb_lf_group@blacksheep.org; Mon, 01 Jan 2018 11:27:25 +0000 Received: from mail-wm0-x229.google.com ([2a00:1450:400c:c09::229]) by relay1.thorcom.net with esmtps (TLSv1.2:ECDHE-RSA-AES256-GCM-SHA384:256) (Exim 4.89) (envelope-from ) id 1eVyFV-0006pb-O0 for rsgb_lf_group@blacksheep.org; Mon, 01 Jan 2018 11:27:24 +0000 Received: by mail-wm0-x229.google.com with SMTP id g75so57460266wme.0 for ; Mon, 01 Jan 2018 03:27:21 -0800 (PST) X-DKIM-Result: Domain=gmail.com Result=Good and Known Domain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=aFb7IGe+Yn2B4iCGHhU60A3EDa8nC9YkxDqPbF+pIV0=; b=u1ygd9iYnQDwoNMvtqj80X7yoEWXwPmMUC2Y3dC/iy2zfDcdUbDY3QsiZbJmMy9uzL kTu/21DzsO1aOOzRbGyQWAZAx2EIyWbHFUJFeKQ3tVWKfTkagqHddFrZGdZxpFaW6gFM /E5l8xeCek3FOKptjddwMzoAKZYk2+K7qfanK6wg46uLcV3PVVY2XwYODNAZnSP0k8yF qUCUWtXSByM5xsvsl7dOstZipUS9BvyHJihSwy34xqpN1BaT4BcIc+21gwDQMhRHgbPW bfmujKVt8V/gidsxyTqxfo5PvuE+209g8pTqGbSvNYmwGBVbEgyHyxPH3PsKxvEM7vOO dGPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=aFb7IGe+Yn2B4iCGHhU60A3EDa8nC9YkxDqPbF+pIV0=; b=Bt9nzpy5fLJ9dkEIjy4OGdKxR+fv02WPbCvtcIvzyshan6Yy60twKYBfRtlyIB9plg Zr5GBnQOblIjIOQF7mFU93NVLxakhi5yLzD/ei3CKV7DVRyL2+CgDG/ksWB1VDXCG0WW ng+NoVPmZUndVv3qsp1jWLPcPsa26s82eFmS0z/DoOVVTREAfWQ03a3CXRkTtXLgkMvJ OmltndJ5fQVFNcN7CLxj2QC/LmS6XP/tjyVXXUJglHAV9ZeM3cQyJk+0OoIfBAv8/QOd +adjzQlmYiU3ceTw475ARqekqCl+RcWG8daKHgTbLM/XShS9V4UgcdX2lH6SC+zPMXMP tgfQ== X-Gm-Message-State: AKGB3mK8HKll9UjxsRffTKIcOcgw/FAsUiTVDYnt+FMu3GR/L1Nfrw1I 0X8egCowvqY45CxcQO1fa2P45trkBT5LdtM5ivk= X-Google-Smtp-Source: ACJfBovSnZH3PdEts+xrJjNZHwnK4u8StysXBcp06ipRPf3frziEKcv1wyshAQSDLpuYkAVpzGClU3ffJ0OUZC+1Zzk= X-Received: by 10.80.170.87 with SMTP id p23mr59230526edc.289.1514806040840; Mon, 01 Jan 2018 03:27:20 -0800 (PST) MIME-Version: 1.0 Received: by 10.80.177.54 with HTTP; Mon, 1 Jan 2018 03:27:20 -0800 (PST) In-Reply-To: <1245872871.20180101103858@gmail.com> References: <1245872871.20180101103858@gmail.com> From: Andy Talbot Date: Mon, 1 Jan 2018 11:27:20 +0000 Message-ID: To: rsgb_lf_group@blacksheep.org Cc: dead.fets@gmail.com X-Spam-Score: 1.0 (+) X-Spam-Report: Spam detection software, running on the system "relay1.thorcom.net", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Seems an odd choice of driver chip. A high/low side driver used in a non-bootstrapped mode to drive two low-side FETs How about one of the normal FET driver chips - picking out one I've used in the past, the MCP14E 3/4/5 family. Logic level input, spec. Logic '0' max 1.3V, Logic '1' min 2.4V. So bias half way and your 2.2V swing takes it into the valid range. [...] Content analysis details: (1.0 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (andy.g4jnt[at]gmail.com) 0.0 HTML_MESSAGE BODY: HTML included in message 0.0 T_DKIM_INVALID DKIM-Signature header exists but is not valid 1.0 FREEMAIL_REPLY From and body contain different freemails X-Scan-Signature: fb42d311bf65eb51bbb8124890b4f977 Subject: Re: LF: Si5351A syntehsiser able to fire a FET driver chip directly?? Content-Type: multipart/alternative; boundary="94eb2c0df40ef7cd130561b5434b" X-Spam-Checker-Version: SpamAssassin 2.63 (2004-01-11) on post.thorcom.com X-Spam-Level: X-Spam-Status: No, hits=0.6 required=5.0 tests=HTML_20_30, HTML_FONTCOLOR_UNSAFE,HTML_MESSAGE autolearn=no version=2.63 X-SA-Exim-Scanned: Yes Sender: owner-rsgb_lf_group@blacksheep.org Precedence: bulk Reply-To: rsgb_lf_group@blacksheep.org X-Listname: rsgb_lf_group X-SA-Exim-Rcpt-To: rs_out_1@blacksheep.org X-SA-Exim-Scanned: No; SAEximRunCond expanded to false --94eb2c0df40ef7cd130561b5434b Content-Type: text/plain; charset="UTF-8" Seems an odd choice of driver chip. A high/low side driver used in a non-bootstrapped mode to drive two low-side FETs How about one of the normal FET driver chips - picking out one I've used in the past, the MCP14E 3/4/5 family. Logic level input, spec. Logic '0' max 1.3V, Logic '1' min 2.4V. So bias half way and your 2.2V swing takes it into the valid range. They three types are inverting, non inverting, and one of each in a package Andy G4JNT On 1 January 2018 at 10:38, Chris Wilson wrote: > > > Hello LF'ers, and a happy and healthy New Year to you all. > > I use my U3S QRP Labs exciter to drive a PA on 137kHz, and it works > fine. Hans, the designer, made changes allowing a 180 degree out of > phase pair of signals to come from the Si5351A synthesizer chip with > the intention of this being able to drive a push pull Class D FET > driver chip directly without a X2 signal being divided and split by a > preceding IC, please see original and simplified circuits below. I > tried this but it appears the circa 2.2V outputs of the Si5351A chip > are not sufficient to drive the inputs of the IR2110 FET driver. > > Any ideas please? Thanks. > > Original PA circuit (works fine with "normal" U3S driving the 74F74 > direct with CLK0 output): > > http://www.gatesgarth.com/amp.jpg > > > > Modded amp circuit (simplified in the hope of building with one less > IC): > > http://www.gatesgarth.com/amp-modded.jpg > > > > IR2110FET driver specs: > > http://www.gatesgarth.com/IR2110.pdf > > > > 74F74 IC specs: > > http://www.gatesgarth.com/74F74.pdf > > > U3S schematic: > > http://www.gatesgarth.com/u3s-schematic.jpg > > > > > -- > Best regards, > Chris mailto:dead.fets@gmail.com > > > --94eb2c0df40ef7cd130561b5434b Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

Seems an odd choice of driver chip.=C2=A0 A high/= low side driver used in a non-bootstrapped mode to drive two low-side FETs= =C2=A0

How about one of the normal FET driver chip= s - picking out one I've used in the past, the MCP14E 3/4/5 family.=C2= =A0 =C2=A0Logic level input, spec. Logic '0' max 1.3V, Logic '1= ' min 2.4V.=C2=A0 =C2=A0So bias half way and your 2.2V swing takes it i= nto the valid range.


They three typ= es are inverting, non inverting, and one of each in a package
Andy=C2=A0 G4JNT



On 1 January 2018 at 1= 0:38, Chris Wilson <dead.fets@gmail.com> wrote:


Hello=C2=A0 LF'ers, and a happy and healthy New Year to you all.

I use my U3S QRP Labs exciter to drive a PA on 137kHz, and it works
fine. Hans, the designer, made changes allowing a 180 degree out of
phase pair of signals to come from the Si5351A synthesizer chip with
the intention of this being able to drive a push pull Class D FET
driver chip directly without a X2 signal being divided and split by a
preceding IC, please see original and simplified circuits below. I
tried this but it appears the circa 2.2V outputs of the Si5351A chip
are not sufficient to drive the inputs of the IR2110 FET driver.

Any ideas please?=C2=A0 =C2=A0 =C2=A0Thanks.

=C2=A0Original=C2=A0 PA=C2=A0 circuit (works fine with "normal" U= 3S driving the 74F74
=C2=A0direct with CLK0 output):

http://www.gatesgarth.com/amp.jpg



Modded=C2=A0 amp=C2=A0 circuit (simplified in the hope of building with one= less
IC):

http://www.gatesgarth.com/amp-modded.jpg



IR2110FET driver specs:

http://www.gatesgarth.com/IR2110.pdf



74F74 IC specs:

http://www.gatesgarth.com/74F74.pdf


U3S schematic:

http://www.gatesgarth.com/u3s-schematic.jpg




--
Best regards,
=C2=A0Chris=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 mailto:d= ead.fets@gmail.com



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