Return-Path: X-Spam-DCC: paranoid 1181; Body=2 Fuz1=2 Fuz2=2 X-Spam-Checker-Version: SpamAssassin 3.1.3 (2006-06-01) on lipkowski.org X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DNS_FROM_AHBL_RHSBL, HTML_30_40,HTML_MESSAGE autolearn=no version=3.1.3 Received: from post.thorcom.com (post.thorcom.com [195.171.43.25]) by paranoid.lipkowski.org (8.13.7/8.13.7) with ESMTP id tAEL57LT002328 for ; Sat, 14 Nov 2015 22:05:07 +0100 Received: from majordom by post.thorcom.com with local (Exim 4.14) id 1Zxhxh-0007r0-Ds for rs_out_1@blacksheep.org; Sat, 14 Nov 2015 21:02:17 +0000 Received: from [195.171.43.32] (helo=relay1.thorcom.net) by post.thorcom.com with esmtp (Exim 4.14) id 1Zxhxh-0007qr-2x for rsgb_lf_group@blacksheep.org; Sat, 14 Nov 2015 21:02:17 +0000 Received: from mail-wm0-f47.google.com ([74.125.82.47]) by relay1.thorcom.net with esmtps (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.86) (envelope-from ) id 1Zxhwd-0006pl-1j for rsgb_lf_group@blacksheep.org; Sat, 14 Nov 2015 21:02:15 +0000 Received: by wmvv187 with SMTP id v187so126327113wmv.1 for ; Sat, 14 Nov 2015 13:00:55 -0800 (PST) X-DKIM-Result: Domain=gmail.com Result=Good and Known Domain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :content-type; bh=f3qCdVHToJ0TqTzONQjVaR8o29NIFc0e1Npr/+8MR6g=; b=nxohO7jCeMGivW/RSMMJMtHJhYBPqNgBXYrxzEnQN0zMnhYnvuVbDbuQ2ywcswKbSS OnGmvLA3bbcYsONLN0EInt34738rUDVARgAd9onDnW4ogSZcHXO2sDHoXB+kW+V6n+/3 VWZi9LX7ZtjAyYgAVkSmynXKJfqwQqJxCXboXnutF0/bPf9OSTuRoWoldK+bCBorPewC /OWbZ/mobegc7Olnp+exMb4XzOk4PXQzoeG7Dt9FHX/NghgQu/bSNG0tiPRC0THvo1IY zm1N3zkjczCtmjqHy9OG2YqCR0U5RjdazDjwwcO8kEbX+G3MQn8gGpMlyEGEiR0elYr7 QWFg== MIME-Version: 1.0 X-Received: by 10.194.7.69 with SMTP id h5mr29174152wja.117.1447534854938; Sat, 14 Nov 2015 13:00:54 -0800 (PST) Received: by 10.28.130.139 with HTTP; Sat, 14 Nov 2015 13:00:54 -0800 (PST) In-Reply-To: References: <56478990.2@abelian.org> Date: Sat, 14 Nov 2015 21:00:54 +0000 Message-ID: From: Andy Talbot To: rsgb_lf_group@blacksheep.org X-Scan-Signature: 40cd937fc1c5e6338b07d288cd09d087 Subject: Re: LF: Ramped BPSK Content-Type: multipart/alternative; boundary=047d7b450a68d4284e0524867876 X-SA-Exim-Scanned: Yes Sender: owner-rsgb_lf_group@blacksheep.org Precedence: bulk Reply-To: rsgb_lf_group@blacksheep.org X-Listname: rsgb_lf_group X-SA-Exim-Rcpt-To: rs_out_1@blacksheep.org X-SA-Exim-Scanned: No; SAEximRunCond expanded to false X-Scanned-By: MIMEDefang 2.56 on 10.1.3.10 Status: O X-Status: X-Keywords: X-UID: 5081 --047d7b450a68d4284e0524867876 Content-Type: text/plain; charset=UTF-8 You can just about get away with clocking the DDS directly for 137kHz. With and additional divide by 16, your DDS has to produce 2.2MHz which is within the capability of a DDS running at 10MHz clock. Just use a decent 5th or 7th order LP elliptic on its output and you can generate up to 3MHz from a 10MHz clock Then your step size will be 10E6 / 2^32 / 16 = 146uHz, and your accuracy worst case, half that at 73uHz Andy On 14 November 2015 at 20:47, wrote: > Hi Andy, > > I was about to solder a dpdt relay across a transformer until I saw your > posting. The DDS here is the 9851 and the 40 bits are loaded serially. > If bits 35-39 are changed from 00000 to 00010 the phase will change by > 180 degrees and so the soldering iron can be switched off? > > An AD9852 would spare me the humiliation of being a significant > part of a mHz off QRG, but these chips seem hard to get. Markus was > right about the resolution. The DDS is clocked at 10 MHz with the > x6 multiplier. The output is then divided by 16. The resolution is just > under 1 mHz and so the frequency error depends on the output frequency. > > 73 Joe VO1NA > > > > On Sat, 14 Nov 2015, Andy Talbot wrote: > > Try the Anlaog Devices web site - www.analog.com >> >> I built my own PCB, http://www.g4jnt.com/AD9852module.pdf (PCBs are >> no >> longer available for that, though). That particular DDS is a bit out of >> date now. I use it for this job as I have a few modules left, and it is >> one of the few devices with both a 48 bit frequency setting register and >> amplitude programmability. >> >> Andy G4JNT >> >> On 14 November 2015 at 19:20, Paul Nicholson wrote: >> >> >>> With sufficiently brief phase steps, those discrete sidebands >>> will fall outside the loading coil bandwidth and be well >>> attenuated. >>> >>> But, does that bring back the audible clicks from the PA >>> and coil? >>> >>> I'm keen to have a play with these DDS chips. Is there a >>> recommended evaluation board? >>> >>> -- >>> Paul Nicholson >>> -- >>> >>> >>> >> > --047d7b450a68d4284e0524867876 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
You can just about get away with clocking the DDS directly= for 137kHz. =C2=A0 =C2=A0With and additional divide by 16, your DDS has to= produce 2.2MHz which is within the capability of a DDS running at 10MHz cl= ock. =C2=A0 Just use a decent 5th or 7th order LP elliptic on its output an= d you can generate up to 3MHz from a 10MHz clock

Then yo= ur step size will be 10E6 / 2^32 / 16 =3D 146uHz, and your accuracy worst c= ase, half that at 73uHz

Andy

<= /div>

On 14 Novemb= er 2015 at 20:47, <jcraig@mun.ca> wrote:
Hi Andy,

I was about to solder a dpdt relay across a transformer until I saw your po= sting.=C2=A0 The DDS here is the 9851 and the 40 bits are loaded serially.<= br> If bits 35-39 are changed from 00000 to 00010 the phase will change by
180 degrees and so the soldering iron can be switched off?

An AD9852 would spare me the humiliation of being a significant
part of a mHz off QRG, but these chips seem hard to get.=C2=A0 Markus was right about the resolution. The DDS is clocked at 10 MHz with the
x6 multiplier. The output is then divided by 16.=C2=A0 The resolution is ju= st
under 1 mHz and so the frequency error depends on the output frequency.

73 Joe VO1NA



On Sat, 14 Nov 2015, Andy Talbot wrote:

Try the Anlaog Devices web site - www.analog.com

I built my own PCB,=C2=A0 =C2=A0http://www.g4jnt.com/AD9852modu= le.pdf=C2=A0 =C2=A0(PCBs are no
longer available for that, though).=C2=A0 That particular DDS is a bit out = of
date now.=C2=A0 I use it=C2=A0 for this job as I have a few modules left, a= nd it is
one of the few devices=C2=A0 with both a 48 bit frequency setting register = and
amplitude programmability.

Andy=C2=A0 G4JNT

On 14 November 2015 at 19:20, Paul Nicholson <vlf0403@abelian.org> wrote:


With sufficiently brief phase steps, those discrete sidebands
will fall outside the loading coil bandwidth and be well
attenuated.

But, does that bring back the audible clicks from the PA
and coil?

I'm keen to have a play with these DDS chips.=C2=A0 Is there a
recommended evaluation board?

--
Paul Nicholson
--





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