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Date: Fri, 2 Oct 2015 15:07:21 +0100
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From: Andy Talbot <andy.g4jnt@gmail.com>
To: rsgb_lf_group@blacksheep.org
Subject: Re: LF: Coherent BPSK on LF using EbNaut
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I know when to give up a poor job!

I built a nice dual 100Hz LPF and coherent 12 bit digitiser sampling at
800Hz.  Formed the results into packets to send to a PC, Wrote some
software for the PC that read the data and plotted a vectorscope, phase,
amplitude etc.   Was almost about to build in an FFT
It all worked very well with a baseband input for testing

I got a Finningley Dongle QSD receiver (very similar to the Softrock) and
modified that for LF input with a 500kHz LPF and removed the caps to allow
a DC coupled output.   Fed my 2.5V reference derived from the A/D converter
reference back to that as its 2.5V centre rail so everything was centred
around a common reference

But I've been having all manner of problems with the DC offset changing and
although it can be made to work - sort of, results are messey.  The DC
offset even changes with input termination impedance

So much so I've lost patience - especially as I had a sudden
realisation.......

Having two SDR-IQ receivers I'm prepared to hack about with one of
them. Although they have an option for an external clock input, I've never
tested it.  So inserted the external clock input socket, disabled its own
XO and got that working.  Discovered the clock input can happily be 64MHz
so long as you tell the software what it is, or 66MHz, or values near
there.   Unfortunately 60MHz doesn't work, and 70MHz is not allowed, so a
simple direct multiplication from a 10MHz reference isn't possible

However, a simple PLL locked at 65MHz or any integer 1 or 2MHz multiple
between say 62 - 69MHz should do.   That will give a coherent locked
receiver, and  the software already is geared up for SDR-IQ interfacing.

Andy  G4JNT


On 2 October 2015 at 03:56, Paul Nicholson <vlf0403@abelian.org> wrote:

>
> Found myself ordering a Trimble 10MHz GPSDO the other day.
> I have a Thunderbolt but don't want to dedicate it to a
> receiver because it's handy in the lab.
>
> Andy wrote:
> > The four-byte packet format has been selected so it is
> > flexible enough to allow a timestamp to be included in
> > the stream, and possibly some info on the block size,
> > with blocks suitably labelled with a header for alignment
>
> You might consider the packet format used by vlfrx-tools, which
> (correct me if I'm wrong Wolf) can also be read by Spectrum Lab.
> It has the fields you need and a magic number to sync on.
>
> Rummaging through my junk box, there's enough parts for a
> simple 137 kHz rx, one axis.  I've a spare BT878 card which
> captures mono 8 bit samples at 448k/sec.  If I mix PPS and
> a 137kHz pre-amp output, with a bit of luck that will give
> coherent broadband reception at LF with absolute phase.
>
> Then we can do some measurements to see how steady and
> repeatable signal phase can be.  We might find that longer
> paths are better.
>
> Where's the natural noise floor at 137kHz? I guess it's around
> 10nV to 100nV per root Hz, depending on time of day, season?
>
> --
> Paul Nicholson
> --
>
>

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<div dir=3D"ltr"><div>I know when to give up a poor job!</div><div><br></di=
v><div>I built a nice dual 100Hz LPF=C2=A0and coherent 12 bit digitiser sam=
pling at 800Hz.=C2=A0=C2=A0Formed the results into packets to send to a PC,=
 Wrote some software for the PC that read the data and plotted a=C2=A0vecto=
rscope, phase, amplitude etc.=C2=A0=C2=A0 Was almost about to build in an F=
FT</div><div>It all worked very well with a baseband input for testing</div=
><div><br></div><div>I got a Finningley Dongle QSD receiver (very similar t=
o the Softrock) and modified that for LF input with a 500kHz LPF and remove=
d the caps to allow a DC coupled output.=C2=A0=C2=A0 Fed my 2.5V reference =
derived from the A/D converter reference back to that as its 2.5V centre ra=
il so everything was centred around a common reference</div><div><br></div>=
<div>But I&#39;ve been having all manner of problems with the DC offset cha=
nging and although it can be made to work - sort of, results are messey.=C2=
=A0 The DC offset even changes with input termination impedance</div><div><=
br></div><div>So much so I&#39;ve lost patience - especially as I had a sud=
den realisation.......</div><div><br></div><div>Having two SDR-IQ receivers=
=C2=A0I&#39;m prepared to hack about with one of them.=C2=A0Although they h=
ave an option for an external clock input, I&#39;ve never tested it.=C2=A0 =
So=C2=A0inserted the external clock input socket, disabled its own XO and g=
ot that working.=C2=A0 Discovered the clock input can happily be 64MHz so l=
ong as you tell the software what it is, or 66MHz, or values near there.=C2=
=A0=C2=A0 Unfortunately 60MHz doesn&#39;t work,=C2=A0and 70MHz is not allow=
ed,=C2=A0so a simple direct multiplication from a 10MHz reference isn&#39;t=
 possible</div><div><br></div><div>However, a simple PLL locked at 65MHz or=
 any integer 1 or 2MHz=C2=A0multiple between say 62 - 69MHz should do.=C2=
=A0=C2=A0 That will give a coherent locked receiver, and=C2=A0 the software=
 already is geared up for SDR-IQ interfacing.</div><div><br></div><div>Andy=
=C2=A0 G4JNT</div><div><br></div></div><div class=3D"gmail_extra"><br><div =
class=3D"gmail_quote">On 2 October 2015 at 03:56, Paul Nicholson <span dir=
=3D"ltr">&lt;<a href=3D"mailto:vlf0403@abelian.org" target=3D"_blank">vlf04=
03@abelian.org</a>&gt;</span> wrote:<br><blockquote class=3D"gmail_quote" s=
tyle=3D"margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><br>
Found myself ordering a Trimble 10MHz GPSDO the other day.<br>
I have a Thunderbolt but don&#39;t want to dedicate it to a<br>
receiver because it&#39;s handy in the lab.<br>
<br>
Andy wrote:<br>
&gt; The four-byte packet format has been selected so it is<br>
&gt; flexible enough to allow a timestamp to be included in<br>
&gt; the stream, and possibly some info on the block size,<br>
&gt; with blocks suitably labelled with a header for alignment<br>
<br>
You might consider the packet format used by vlfrx-tools, which<br>
(correct me if I&#39;m wrong Wolf) can also be read by Spectrum Lab.<br>
It has the fields you need and a magic number to sync on.<br>
<br>
Rummaging through my junk box, there&#39;s enough parts for a<br>
simple 137 kHz rx, one axis.=C2=A0 I&#39;ve a spare BT878 card which<br>
captures mono 8 bit samples at 448k/sec.=C2=A0 If I mix PPS and<br>
a 137kHz pre-amp output, with a bit of luck that will give<br>
coherent broadband reception at LF with absolute phase.<br>
<br>
Then we can do some measurements to see how steady and<br>
repeatable signal phase can be.=C2=A0 We might find that longer<br>
paths are better.<br>
<br>
Where&#39;s the natural noise floor at 137kHz? I guess it&#39;s around<br>
10nV to 100nV per root Hz, depending on time of day, season?<br>
<br>
--<br>
Paul Nicholson<br>
--<br>
<br>
</blockquote></div><br></div>

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