Return-Path: X-Spam-DCC: paranoid 1170; Body=2 Fuz1=2 Fuz2=2 X-Spam-Checker-Version: SpamAssassin 3.1.3 (2006-06-01) on lipkowski.org X-Spam-Level: X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DNS_FROM_AHBL_RHSBL, HTML_MESSAGE autolearn=no version=3.1.3 Received: from post.thorcom.com (post.thorcom.com [195.171.43.25]) by paranoid.lipkowski.org (8.13.7/8.13.7) with ESMTP id t8TJfam2007383 for ; Tue, 29 Sep 2015 21:41:36 +0200 Received: from majordom by post.thorcom.com with local (Exim 4.14) id 1Zh0iI-0001y8-Vg for rs_out_1@blacksheep.org; Tue, 29 Sep 2015 20:37:22 +0100 Received: from [195.171.43.32] (helo=relay1.thorcom.net) by post.thorcom.com with esmtp (Exim 4.14) id 1Zh0iI-0001xz-2c for rsgb_lf_group@blacksheep.org; Tue, 29 Sep 2015 20:37:22 +0100 Received: from mail-wi0-f174.google.com ([209.85.212.174]) by relay1.thorcom.net with esmtps (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.86) (envelope-from ) id 1Zh0hI-0006FX-Tj for rsgb_lf_group@blacksheep.org; Tue, 29 Sep 2015 20:37:20 +0100 Received: by wiclk2 with SMTP id lk2so31260815wic.1 for ; Tue, 29 Sep 2015 12:36:05 -0700 (PDT) X-DKIM-Result: Domain=gmail.com Result=Good and Known Domain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :content-type; bh=ZPNA2RusifBfFwpORULENME/d0wguLxVrrS11Xzu2Eg=; b=FMlOG1mmyzSY2JBIYMR+Ef3TMXgUQagcvCeiN3nNFzL1+s+fCcl/jyrKSNQ1uuqleT WRk9A9HkOLpiN5/qzCyMPgYTttEfUkmVZfu9aw6px1skNvnWYcoYooKtteEEeo6p5kiH P5cHdPz9JS0/R19ljblQPU60yAu5t/v32sGwMNDymvcDTuZJ21BQqypju4+4rogHvrbo avLO+cxpvtiK6hv+NU9hlr5Ie4BptxL+wQ1wIw4wsnrIRoyzPYKUdPWAhSPTmhpJO59S UdmTgvQExOFrd+SzG0AETB/hJ/ELXAv++xdTs5+deihLRZ3Co45qS40/5r6hJxFy8cr/ 5UAQ== MIME-Version: 1.0 X-Received: by 10.194.90.47 with SMTP id bt15mr33282782wjb.18.1443555365258; Tue, 29 Sep 2015 12:36:05 -0700 (PDT) Received: by 10.28.47.212 with HTTP; Tue, 29 Sep 2015 12:36:05 -0700 (PDT) In-Reply-To: <56093BBC.9090104@tele2.se> References: <5601EC9F.2010607@gmail.com> <56059B48.80606@freenet.de> <56069AD1.4040303@abelian.org> <56091C59.5010205@tele2.se> <56093BBC.9090104@tele2.se> Date: Tue, 29 Sep 2015 20:36:05 +0100 Message-ID: From: Andy Talbot To: rsgb_lf_group@blacksheep.org X-Scan-Signature: 3dad7246509e3b317974c9d84e795ac1 Subject: Re: LF: Coherent BPSK on LF using EbNaut Content-Type: multipart/alternative; boundary=047d7bfd0062c28f060520e7ecf8 X-SA-Exim-Scanned: Yes Sender: owner-rsgb_lf_group@blacksheep.org Precedence: bulk Reply-To: rsgb_lf_group@blacksheep.org X-Listname: rsgb_lf_group X-SA-Exim-Rcpt-To: rs_out_1@blacksheep.org X-SA-Exim-Scanned: No; SAEximRunCond expanded to false X-Scanned-By: MIMEDefang 2.56 on 10.1.3.10 Status: O X-Status: X-Keywords: X-UID: 4212 --047d7bfd0062c28f060520e7ecf8 Content-Type: text/plain; charset=UTF-8 Yep, that S2 was a typo. I'm in the process of building a custom direct conversion Rx for narrowband. So far I've built a follow on digitiser for Softrock or QSD type receivers. Two identical opamp filters with a cutoff of 100Hz driving a pair of simultaneous-sampled 12 bit A/D converters. A sampling rate of 1.25kHz (it could be lower) provides a degree of oversampling at this bandwidth and enough freedom to play with decimation later. The A/D results are formatted in a PIC and sent on an RS232 type interface in 4 byte packets at 115200 baud. (RS232 type signalling using FTDI Chip devices can be made transparent to look like a USB interface to end users) The A/D clocking is controlled from a 10Mhz referenc einput which is used to clock teh PIC microcontroller. I realise the dynamic range and sampling are appreciably above what is actually required for receiving narrow band coherent signals - two bit was mentioned here and a 200Hz sampling - but this sort of hardware is, these days, very basic so might as well have a higher than needed performance. And it does mean the hardware is suitable for faster working, for signals up to 100Hz wide. Ie it'll pass PSK31 The PIC code at the moment just formats the samples and sends them, but the next stage will be to modify the PIC code to accept a GPS input of NMEA and 1 PPS. Receiving can then be based on GPS synced blocks. The four-byte packet format has been selected so it is flexible enough to allow a timestamp to be included in the stream, and possibly some info on the block size, with blocks suitably labelled with a header for alignment High level code to run on a PC to take these samples and "do clever things" with the data will follow . To complete the receiver an LO will be needed. The simplest route is to take one of the AD9850 DDS modules, clock it at 10MHz and generate the 4X LO for the Softrock / QSD receiver. Teh only thing that concerns me about the AD9850 is its 32 bit frequency setting. The resolution, at 10MHz clock is 10MHz / 2^32 giving a frequency setting accuracy of +/- 0.0011Hz. Which may not sound a lot, but does correspond to a complete cycle in 14 minutes. Or 90 degrees in 3.6 minues. Which certainly is significant when measuring long term phase and needs taking out in the final software. The alternative is to use a 48 bit DDS like the AD9852 for the LO. Or do as I once did on a coherent test with G3PLX, specifiy and use an on-air frequency that is exact when generated in a 32 bit DDS. Full details of the receiver will be written up and published when the whole system is complete. The interface format (the four byte packet) needs to have the timestamp yet to be defined, but I'll publish that ASAP. Andy G4JNT On 28 September 2015 at 14:08, Johan Bodin wrote: > Aha... Thanks Andy. > > I assume that the second -S2 in your expression of Q is a typo. If changed > to -S3 it all makes sense and the mixing with a quadrature LO at Fs/4 > becomes clear. It was something like this I had in mind. This is of course > possible to do directly at RF but now I see that downconversion to a low IF > before this process is a better idea since it doesn't require heavy > decimation of a signal with ridiculous Fs / BW ratio and it stays away from > 1/f noise in analog parts as well. > > I was thinking along the lines of a QSD when I suggested the simple > sampling sequence I, Q, -I -Q. There is no doubt that the hardware QSD > *does* work although the samples are not instantaneous but rather averaged > over a 1/4 LO cycle in the 4 LPFs of the QSD. Without thinking too much, I > had the feeling that a narrow BPF ahead of the ADC would "smear" the signal > in the time domain and produce a similar result in the ADC case... > > Interesting anyway. > > >> > > --047d7bfd0062c28f060520e7ecf8 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
Yep, that S2 was a typo.

I'm in the= process of building a custom direct conversion Rx for narrowband. =C2=A0 S= o far I've built a follow on digitiser for Softrock or QSD type receive= rs.=C2=A0 Two identical =C2=A0opamp filters with a cutoff =C2=A0of 100Hz dr= iving a pair of simultaneous-sampled 12 bit A/D converters. =C2=A0 A sampli= ng rate of 1.25kHz (it could be lower) provides a degree of oversampling at= this bandwidth and enough freedom to play with decimation later. =C2=A0 = =C2=A0The A/D results are formatted in a PIC and sent on an RS232 type inte= rface in 4 byte packets at 115200 baud. =C2=A0 (RS232 type signalling using= FTDI Chip devices can be made transparent to look like a USB interface to = end users) =C2=A0The A/D clocking is controlled from a 10Mhz referenc einpu= t which is used to clock teh PIC microcontroller.

= I realise the dynamic range and sampling are appreciably above what is actu= ally required for receiving narrow band coherent signals - two bit was ment= ioned here and a 200Hz sampling - but this sort of hardware is, these days,= very basic so might as well have a higher than needed performance.=C2=A0 A= nd it does mean the hardware is suitable for faster working, for signals up= to 100Hz wide.=C2=A0 Ie it'll pass PSK31

The = PIC code at the moment just formats the samples and sends them, but the nex= t stage will be to modify the PIC code to accept a GPS input of NMEA and 1 = PPS.=C2=A0 Receiving can =C2=A0then be based on GPS synced =C2=A0blocks. = =C2=A0 The four-byte packet format has been selected so it is flexible enou= gh to allow a timestamp to be included in the stream, and possibly some inf= o on the block size, with blocks suitably labelled with a header for alignm= ent

High level code to run on a PC to take these s= amples and "do clever things" with the data will follow .

To complete the receiver an LO will be needed. =C2=A0 The= simplest route is to take one of the AD9850 DDS modules, clock it at 10MHz= and generate the 4X LO for the Softrock / QSD receiver.=C2=A0 Teh only thi= ng that concerns me about the AD9850 is its 32 bit frequency setting. =C2= =A0 =C2=A0The resolution, at 10MHz clock is 10MHz / 2^32 giving a frequency= setting accuracy of =C2=A0+/- 0.0011Hz. =C2=A0 Which may not sound a lot, = but does correspond to a complete cycle in 14 minutes. =C2=A0 Or 90 degrees= in 3.6 minues.=C2=A0 Which certainly is significant when measuring long te= rm phase and needs taking out in the final software. =C2=A0
The a= lternative is to use a 48 bit DDS like the AD9852 for the LO. =C2=A0=C2=A0<= /div>
Or do as I once did on a coherent test with G3PLX, specifiy and u= se =C2=A0an on-air frequency that is exact when generated in a 32 bit DDS.<= /div>

Full details of the receiver will be written up an= d published when the whole system is complete. =C2=A0 The interface format = (the four byte packet) needs to have the timestamp yet to be defined, but I= 'll publish that ASAP.

Andy =C2=A0G4JNT
<= div class=3D"gmail_extra">
On 28 September 20= 15 at 14:08, Johan Bodin <jhbodin@tele2.se> wrote:
=20 =20 =20
Aha... Thanks Andy.

I assume that the second -S2 in your expression of Q is a typo. If changed to -S3 it all makes sense and the mixing with a quadrature LO at Fs/4 becomes clear. It was something like this I had in mind. This is of course possible to do directly at RF but now I see that downconversion to a low IF before this process is a better idea since it doesn't require heavy decimation of a signal with ridiculous Fs / BW ratio and it stays away from 1/f noise in analog parts as well.

I was thinking along the lines of a QSD when I suggested the simple sampling sequence I, Q, -I -Q. There is no doubt that the hardware QSD *does* work although the samples are not instantaneous but rather averaged over a 1/4 LO cycle in the 4 LPFs of the QSD. Without thinking too much, I had the feeling that a narrow BPF ahead of the ADC would "smear" the signal in the time domain and pr= oduce a similar result in the ADC case...

Interesting anyway.





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