Message-ID: <003701c1a49f$a026feb0$0886a4cb@CO3043446A>
From: "Graeme Zimmer" <gzimmer@optushome.com.au>
To: rsgb_lf_group@blacksheep.org
References: <E16TKKA-0000vM-00@mail1.isys.net>
Subject: LF: Re: Digital Sine Generators
Date: Thu, 24 Jan 2002 17:23:21 +1100
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Dear Klaus,

Thank you for your good humour and patience in answering my dumb questions.
It's embarrassing for me to show my ignorance in public, but it's worth it
if
I learn something useful.

For a long time now I've been trying to understand the practical trade-offs
in DDS design.

So let's see if I have this DDS Distortion thing right ...........

Memory Quantisation:
----------------------

If all of the bits in a DDS latch are used to drive the Sine ROM, then there
is NO problem with memory quantisation.

If the Latch has many bits (e.g. to get fine frequency steps) then the ROM
will have to be excessively large. If only the higher order bits are used to
drive the ROM, then the wave generated will have a degree of roughness.

In the special case where the low order (unused) bits do not change (e.g.
where the matching low order Increment bits are at zero), then there is also
no quantisation error (is this correct?).

Question: If we use a modern DDS chip, but limit the steps used to those
which only exercise the ROM address lines, does this give us a more pure
signal ?

In practical DDS design, there are various methods to increase the
resolution without increasing the ROM size. One method is to interpolate the
"missing" readings. The simplest would be to draw a straight line between
the two readings and then subdivide it into as many points as are required.

D/A Quantisation:
-------------------

This is caused by the limit to the number of bits in each ROM location.