Message-ID: <000601bfba97$4a4f9220$0a00a8c0@server1.ThreeLakes.ca>
From: "Larry Kayser" <kayser@sympatico.ca>
To: rsgb_lf_group@blacksheep.org
Subject: LF: Re: DDS Source board, email earlier today.
Date: Wed, 10 May 2000 11:48:06 -0400
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Andy:

>From your earlier message today......

>Any frequency modulation - or phase change - will
>be made in real time by a PC sending serial commands to the DDS.

This single control process for the AD9850 will make the design have
severely limited application opportunities.  Please consider the following.


My design work todate, because the device has a smaller number of pins (than
the AD9850) to mess up with during trying to get the chip stuck to the pc
board, has been with the AD9835.  The AD9835 has some special pins called
PSEL0, PSEL1 and FSELECT which permit the external driving of the DDS chip
to change the phase to one of four values and select one of two frequency
registers.  I tried to naratively tell you about the need for these pins /
control lines yesterday.

After reading your email this morning, quote above, I realized there is a
problem that I offer needs your attention.  I have downloaded the AD9850
specs and see that the AD9850 has for some reason not brought out these
external drive pins a neatly as they did on the earlier chip.

I offer that to have maximum efficiency when using a serial line into a PIC
to control the AD9850 it will be necessary to have your board OR an external
drive signal with the signal from the 16F84 for the W_CLK signal so that
accurate control of the FSK or PSK transition events can occur.  The control
could occur from either the 16F84 or from an external signal source.

The first need is that an external drive signal can control the timing of
the BPSK or the FSK change / shift event.  If I have it right, I suggest
that the on board 16F84  needs to also sense when the external control
signal on W_CLK has occurred so that the 16F84 can under program control
allow the next event to be uploaded and prepared to shifting into the DDS
portion of the chip.  IF I HAVE THIS RIGHT, this is the only way that
accurate timing of events into the DDS for FSK and PSK can occur.  I can
absolutely assure you that the ASYNC serial port output of any Win95, Win98,
NT-4, and NT-2000 WILL NOT achieve the timing accuracy needed for FSK or
BPSK state changes.

As I was reading the AD9850 specification sheet I also note that your board
would also need to accommodate the optional use of the Comparator resources
on the chip so that the user would have the option of a sine wave output or
a square wave output from the AD9850.

The above is offered only as a way to make the AD9850 board fit a maximum
number of possible applications and options in the user community.

73

Larry
VA3LK