Return-Path: X-Spam-DCC: paranoid 1181; Body=2 Fuz1=2 Fuz2=2 X-Spam-Checker-Version: SpamAssassin 3.1.3 (2006-06-01) on lipkowski.org X-Spam-Level: X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00,DNS_FROM_AHBL_RHSBL, NO_REAL_NAME autolearn=no version=3.1.3 Received: from post.thorcom.com (post.thorcom.com [195.171.43.25]) by paranoid.lipkowski.org (8.13.7/8.13.7) with ESMTP id tAEKpvg3002284 for ; Sat, 14 Nov 2015 21:51:57 +0100 Received: from majordom by post.thorcom.com with local (Exim 4.14) id 1Zxhl8-0007c3-52 for rs_out_1@blacksheep.org; Sat, 14 Nov 2015 20:49:18 +0000 Received: from [195.171.43.32] (helo=relay1.thorcom.net) by post.thorcom.com with esmtp (Exim 4.14) id 1Zxhl7-0007bu-TP for rsgb_lf_group@blacksheep.org; Sat, 14 Nov 2015 20:49:17 +0000 Received: from nina.ucs.mun.ca ([134.153.232.76]) by relay1.thorcom.net with esmtps (TLSv1:DHE-RSA-AES256-SHA:256) (Exim 4.86) (envelope-from ) id 1Zxhk4-0006kO-Iy for rsgb_lf_group@blacksheep.org; Sat, 14 Nov 2015 20:49:16 +0000 Received: from plato.ucs.mun.ca (plato.ucs.mun.ca [134.153.232.153]) by nina.ucs.mun.ca (8.13.1/8.13.1) with ESMTP id tAEKlrYa003830 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Sat, 14 Nov 2015 17:17:54 -0330 Date: Sat, 14 Nov 2015 17:17:53 -0330 (NST) From: jcraig@mun.ca X-X-Sender: jcraig@plato.ucs.mun.ca To: rsgb_lf_group@blacksheep.org In-Reply-To: Message-ID: References: <56478990.2@abelian.org> MIME-Version: 1.0 X-Scan-Signature: 66d07794ca19cd68f7d6cc289cd4ac18 Subject: Re: LF: Ramped BPSK Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed X-SA-Exim-Scanned: Yes Sender: owner-rsgb_lf_group@blacksheep.org Precedence: bulk Reply-To: rsgb_lf_group@blacksheep.org X-Listname: rsgb_lf_group X-SA-Exim-Rcpt-To: rs_out_1@blacksheep.org X-SA-Exim-Scanned: No; SAEximRunCond expanded to false X-Scanned-By: MIMEDefang 2.56 on 10.1.3.10 Status: O X-Status: X-Keywords: X-UID: 5079 Hi Andy, I was about to solder a dpdt relay across a transformer until I saw your posting. The DDS here is the 9851 and the 40 bits are loaded serially. If bits 35-39 are changed from 00000 to 00010 the phase will change by 180 degrees and so the soldering iron can be switched off? An AD9852 would spare me the humiliation of being a significant part of a mHz off QRG, but these chips seem hard to get. Markus was right about the resolution. The DDS is clocked at 10 MHz with the x6 multiplier. The output is then divided by 16. The resolution is just under 1 mHz and so the frequency error depends on the output frequency. 73 Joe VO1NA On Sat, 14 Nov 2015, Andy Talbot wrote: > Try the Anlaog Devices web site - www.analog.com > > I built my own PCB, http://www.g4jnt.com/AD9852module.pdf (PCBs are no > longer available for that, though). That particular DDS is a bit out of > date now. I use it for this job as I have a few modules left, and it is > one of the few devices with both a 48 bit frequency setting register and > amplitude programmability. > > Andy G4JNT > > On 14 November 2015 at 19:20, Paul Nicholson wrote: > >> >> With sufficiently brief phase steps, those discrete sidebands >> will fall outside the loading coil bandwidth and be well >> attenuated. >> >> But, does that bring back the audible clicks from the PA >> and coil? >> >> I'm keen to have a play with these DDS chips. Is there a >> recommended evaluation board? >> >> -- >> Paul Nicholson >> -- >> >> >