Date: Wed, 31 Jan 2018 00:04:30 +0000
From: Chris Wilson <dead.fets@gmail.com>
Message-ID: <524707440.20180131000430@gmail.com>
To: LineOne <rsgb_lf_group@blacksheep.org>
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Subject: Re: LF: Softrock RX divider IC problem, unexpected frequency out
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Hello Andy,

I cannot test into the divider as I lost a pad off the PCB and have no
more  IC's  left, but some are coming and I can jury rig the board for
testing  even  if  it  won't  be pretty, but I added a Schmitt IC on a
breadboard with long leads, biased with two 10k resistors on the input
pin,  and  AC  coupled with a 0.1uf ceramic. The resulting wave form is
at:

http://www.gatesgarth.com/lf-schmitt-on-collector-q2.jpg

But  aside  from  that  in  messing  I  have found the oscillator will
sometimes  not  start  up,  but  touching the board will get it going.
Also  I  noticed  some wild HF oscillations when it played up as I was
using  my  better bench scope, not the USB one. So I think the crystal
Colpitts oscillator or crystal itself is suspect. I am Googling how to
derive  optimum cap values for an unknown spec crystal but not getting
very far... Is there a way to derive values other than experimentally,
and  what  experimental  methods  would  be  correct?  I  have left it
oscillating  away  overnight  to  see  what, if anything, it does long
term.  When  there  were no HF additional oscillations the output even
without  the  Schmitt  was  a lot squarer and more even than my ealier
scope  capture.  I think Pete M0MFT is right and the oscillator itself
is  also rather sub optimal in my case. N1BUG used a modern crystal of
known origin, mine is a begged bag of 4 NOS, unknown origin.

Thanks  again.  All child's play to most of you guys, all new to me ;)
But still much more satisfying than buying commercial black boxes!

Saturday, January 27, 2018, 4:49:55 PM, you wrote:

> Looking at the schematic, I see a 74AC74 divider is used which
> works at over 100MHz clock frequency.   You are hitting its edge
> triggered clock inputs with low frequency waveform (461kHz) with  a
> slow and indeterminate rise time caused by crude semi-linear
> amplification plus clipping.   It really is no wonder the system is
> not driving the divider properly.    That sluggish edge has to hit
> the D input on both flip-flops and cause them to toggle together.  
> I'm surprised it even appears to work at HF where the design originated.


> That design with no proper logic level squarer is just asking for
> trouble and I'd be surprised if you ever get it to work properly. 
> It might, perhaps, if the divider were changed to a slower 74HC74
> device, but that's a bit speculative;  it may be just as bad.


>  I would suggest you stop fiddling about with component values,
> trying to frig an unsuitable design.  You MUST feed   a proper
> shaped logic level to such high speed divider chips.  There really
> is no getting round that fact.  They won't work properly otherwise -
> just look at the specifications for AC series logic.


> You can keep the simple single transistor buffer, but use its
> output to feed the input of a shaping gate.  A Schmitt like a 74HC14
> (a package that has 6 suitable gates) ought to do you nicely.   
> Bias the input mid way between its two threshold voltage - these are
> different for HC and HCT family devices, so consult the data sheet. 
> AC couple your RF to the mid-biassed input and connect output to the
> divider.       Look at the gate output on a scope and you'll have a
> beautiful square wave width lovely vertical edges and perfect
> quadrature generation however low a drive signal you put in.


> Andy  G4JNT


-- 
Best regards,
 Chris                            mailto:dead.fets@gmail.com