Message-ID: <41EC16AD.9070205@freenet.de>
Date: Mon, 17 Jan 2005 20:49:01 +0100
From: Wolf DL4YHF <dl4yhf@freenet.de>
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References: <005801c4fc0a$c5526380$0500a8c0@charter.net> <41EADCD8.1050806@freenet.de> <5.1.0.14.0.20050117091031.00c2e9b8@u0019445.kuleuven.be> <002901c4fc91$8b6f4840$0500a8c0@charter.net>
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Subject: Re: LF: Image-Cancelling Exciter
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Hi Rik and John,

Another problem with the 4017 "Johnson" counter is, the output timing is 
not very precise because it is an asynchronous counter. To divide by 4, 
one of the 4017's outputs (Q4)  must be connected to the RESET input to 
reset the counter if the 5th output is set. The time required to reset 
the counter, no matter how short, will be missing in one of the 4 
"wanted" output pulses (Q0 to be precise). So the length of the 4 output 
pulses will differ by some XX nanoseconds.
A synchronous counter (or divider) where all clock inputs are connected 
in parallel will perform better, there will be no difference in the 
propagation delays for all 4 outputs. Furthermore, the 74HC107 provides 
the inverter for the 74HC4066 for free. I tried to measure the delay 
between inverting and non-inverting output from one flipflop, it was 
below 2 ns (no accurate measurement possible with a 60MHz-scope).

Regards,
Wolf DL4YHF .


John Andrews schrieb:

>Rik,
>
>  
>
>>if you want to use 4000 series logic in fast speed applciactions it can be
>>used at 15V. This will increase the speed by a factor 3..4 compared to 5V.
>>    
>>
>
>Agreed. But I would not have been able to use the 74HC4066 switch, and I
>wanted to stick with that.
>
>John A.
>
>
>
>
>
>  
>