Return-Path: Received: (qmail 23995 invoked from network); 21 Jan 2001 07:18:16 -0000 Received: from unknown (HELO murphys-inbound.servers.plus.net) (212.159.14.225) by extortion.plus.net with SMTP; 21 Jan 2001 07:18:16 -0000 Received: (qmail 1780 invoked from network); 21 Jan 2001 07:21:00 -0000 Received: from unknown (HELO post.thorcom.com) (212.172.148.70) by murphys with SMTP; 21 Jan 2001 07:21:00 -0000 X-Priority: 3 X-MSMail-Priority: Normal Received: from majordom by post.thorcom.com with local (Exim 3.16 #1) id 14KEhp-0002c9-00 for rsgb_lf_group-outgoing@blacksheep.org; Sun, 21 Jan 2001 07:14:29 +0000 Received: from imo-r03.mx.aol.com ([152.163.225.3]) by post.thorcom.com with esmtp (Exim 3.16 #1) id 14KEho-0002c4-00 for rsgb_lf_group@blacksheep.org; Sun, 21 Jan 2001 07:14:28 +0000 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1106 Received: from WarmSpgs@aol.com by imo-r03.mx.aol.com (mail_out_v29.5.) id l.2f.fe468b0 (17532) for ; Sun, 21 Jan 2001 02:13:33 -0500 (EST) From: WarmSpgs@aol.com Message-ID: <2f.fe468b0.279be61d@aol.com> Date: Sun, 21 Jan 2001 02:13:33 EST Subject: Re: LF: PLL inaccuracy To: rsgb_lf_group@blacksheep.org MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 8bit X-Mailer: AOL 4.0 for Windows 95 sub 120 Precedence: bulk Reply-To: rsgb_lf_group@blacksheep.org X-Listname: rsgb_lf_group Sender: In a message dated 1/20/01 4:27:03 PM Eastern Standard Time, akestelo@bellatlantic.net writes: << For simplicity's sake, let's assume that we have a phase comparator that needs a 1 Hz difference between its two inputs before it creates a DC correction signal large enough to control the VCO (not a very good phase comparator, assuredly, but just for demonstration purposes). >> Ah, but that's the point. It would be an extraordinarily bad phase comparator if it didn't begin to respond until there was a 360 degree/second error. A PLL using such a comparator could probably never achieve lock. At best, it would wander loosely around the hoped-for frequency. There does not have to be a frequency error at all for a phase comparator to output a correction voltage...only for the oscillator being stabilized to have a _tendency_ to drift away from the desired frequency, which is inevitable. Hence, once lock has been achieved, a more-or-less constant phase difference is maintained by the loop. This is not frequency error. Time is the difference between frequency and phase, as in Alan's analysis. A _frequency_ difference between two signals means the _phase_ relationship is changing continuously in the same direction over the course of time. If f1 > f2, the phase of f1 is constantly advancing relative relative to that of f2, for just as long as the frequency difference is allowed to exist. This is the condition when lock has not been achieved. When a PLL achieves lock, phase of the controlled oscillator is NOT allowed to move continuously in either direction. There may be short-term variations around the center, but no continuing trend (thus, phase lock). Without continuous phase change in a given direction, there is no frequency error relative to the reference. The remaining short term variations around the desired phase relationship are simply that: phase noise, or jitter. I hope this helps clarify the distinction. 73, John