Message-ID: <000d01c1a003$deda9ea0$350d97d4@oemcomputer>
From: "Johan Bodin" <sm6lkm.jbeab@swipnet.se>
To: rsgb_lf_group@blacksheep.org
References: <005601c19e0f$02d50ee0$1700a8c0@home> <3C45AD94.A920B8FC@usa.net> <3C46B9FA.BC73BC10@netscapeonline.co.uk> <3C4703C2.78D4B46F@usa.net> <5.1.0.14.0.20020117235901.00ad8170@POP2.sympatico.ca>
Subject: Re: LF: G0MRF/SM6LKM DDS VFO and Jason
Date: Fri, 18 Jan 2002 10:37:23 +0100
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Larry VA3LK wrote:

> Please, for serial protocol just use what Andy has already done or do the
> exact same functions, Integer steps at the limits of the DDS chip.

OK. It looks like we already have a standard. Andy, can you describe your protocol?


> The worst result for me would be doing something like 10 milliHz steps,
> which again would be not quite 10 milliHz for those with different
> Reference oscillator frequencies.  The use of a second DDS to make a nice
> round integer clock for a DDS would be the best solution but is overly
> costly at the moment.

If we all clock our DDS chips with 5 or 10MHz from frequency standards, we
will have common "channels" although the numbers will not be nice (a lot of
ugly decimals). The 10MHz guys (including me) will only have access to
half the number of "channels" because of the doubled step size... However,
901943 "channels" on the 136kHz band is enough for me :-)


> PS, one final point, I would implement a trigger input on the PIC as well
> so that one can easily make the whole DDS setup coherent to a 1 Second
> resource as well.  I have that here now on the BPSK and it could be used to
> squeeze a bit out of the system.....

Yes, I am thinking about a way to implement this in the new software for the
G0MRF DDS board. It is probably a good idea to make soft phase
transitions considering the huge reactive power that is circulating in the
antenna circuits at the QRO stations. Swiching phase 180 degrees
instantaneously in such a setup would be like throwing in the reverse gear
when driving forward at 100 MPH...

73
Johan SM6LKM